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Efficient design of variation-resili...

Dehaene, Wim.

Efficient design of variation-resilient ultra-low energy digital processors

Record Type:	Electronic resources : Monograph/item
Title/Author:	Efficient design of variation-resilient ultra-low energy digital processorsby Hans Reyserhove, Wim Dehaene.
Author:	Reyserhove, Hans.
other author:	Dehaene, Wim.
Published:	Cham :Springer International Publishing :2019.
Description:	xxiv, 209 p. :ill., digital ;24 cm.
Contained By:	Springer eBooks
Subject:	Integrated circuitsDesign and construction.
Online resource:	https://doi.org/10.1007/978-3-030-12485-4
ISBN:	9783030124854$q(electronic bk.)

Efficient design of variation-resilient ultra-low energy digital processors
Reyserhove, Hans.

Efficient design of variation-resilient ultra-low energy digital processors[electronic resource] /by Hans Reyserhove, Wim Dehaene. - Cham :Springer International Publishing :2019. - xxiv, 209 p. :ill., digital ;24 cm.

Chapter 1. Energy-Efficient Processors: Challenges and Solutions -- Chapter 2. Near-Threshold Operation: Technology, Building Blocks and Architecture -- Chapter 3. Efficient VLSI Design Flow -- Chapter 4. Ultra-Low Voltage Microcontrollers -- Chapter 5. Error Detection and Correction -- Chapter 6. Timing Error-Aware Microcontroller -- Chapter 7. Conclusion.

This book enables readers to achieve ultra-low energy digital system performance. The author's main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy. Presents a full bottom-up micro-electronics approach: circuit-level, design strategy and CAD automation, architecture optimization Motivates discussion with simulation results and/or measurements in an advanced nanometer CMOS process Compares traditional circuit/design/architecture techniques and state-of-the-art, setting the landscape of current best performance and how it can be improved.

ISBN: 9783030124854$q(electronic bk.)

Standard No.: 10.1007/978-3-030-12485-4doiSubjects--Topical Terms:

184690
Integrated circuits
--Design and construction.

LC Class. No.: TK7874 / .R49 2019

Dewey Class. No.: 621.3815

Efficient design of variation-resilient ultra-low energy digital processors
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505 0 $a Chapter 1. Energy-Efficient Processors: Challenges and Solutions -- Chapter 2. Near-Threshold Operation: Technology, Building Blocks and Architecture -- Chapter 3. Efficient VLSI Design Flow -- Chapter 4. Ultra-Low Voltage Microcontrollers -- Chapter 5. Error Detection and Correction -- Chapter 6. Timing Error-Aware Microcontroller -- Chapter 7. Conclusion.
520 $a This book enables readers to achieve ultra-low energy digital system performance. The author's main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy. Presents a full bottom-up micro-electronics approach: circuit-level, design strategy and CAD automation, architecture optimization Motivates discussion with simulation results and/or measurements in an advanced nanometer CMOS process Compares traditional circuit/design/architecture techniques and state-of-the-art, setting the landscape of current best performance and how it can be improved.
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