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Design of CMOS phase-locked loops :f...

Razavi, Behzad,

Design of CMOS phase-locked loops :from circuit level to architecture level /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Design of CMOS phase-locked loops :Behzad Razavi, University of California, Los Angeles.
Reminder of title:	from circuit level to architecture level /
Author:	Razavi, Behzad,
Description:	xvi, 492 pages ;26 cm.
Subject:	Phase-locked loopsDesign and construction.
ISBN:	9781108494540

Design of CMOS phase-locked loops :from circuit level to architecture level /
Razavi, Behzad,

Design of CMOS phase-locked loops :from circuit level to architecture level /Behzad Razavi, University of California, Los Angeles. - xvi, 492 pages ;26 cm.

Includes bibliographical references and index.

"A quick search on Google brings up nearly two dozen books on PLLs. So why another one? This book addresses the need for a text that methodically teaches modern CMOS PLLs for a wide range of applications. The objective is to teach the reader how to approach PLLs from transistor-level design to architecture development. Based on 25 years of teaching courses on the subject and the latest trends in industry, this book deals with oscillators, phase noise, analog phase-locked loops, digital phase-locked loops, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers. The objective is to reach a broad spectrum of readers while maintaining a cohesive flow. As with my past writings, I have implemented a multitude of pedagogical tools to help the reader learn efficiently-and experience the pleasure of learning. One principle that I uphold in writing is to start with the simplest possible arrangement, teach how it works and what shortcomings it has, and then add components to it to improve its performance. This approach allows the reader to see how a basic architecture evolves to a complex system. After laying the theoretical foundation for each topic, I present a step-by-step design flow and proceed to design the circuit. And not all design efforts are successful. The reader can clearly see how certain decisions lead to a dead end and how we revise these decisions to reach a new, more practical solution. This exploratory mentality not only makes the process of learning more exciting but also helps the reader see why each component is necessary, what criteria govern its choice, and what not to do. A unique aspect of this book is its extensive use of simulations to teach design and investigate agreement between theory and practice. For each design, I use the theoretical basis to choose certain parameters and predict the performance, and then I simulate the circuit. If the simulation results do not agree with the predictions, I delve into the details and determine why. Another unique aspect of this book is that it leverages concepts from one field (e.g., wireless technology) to another (e.g., wireline communications) by bringing the vast knowledge in these fields under one roof. A website for the book provides additional resources for readers and instructors, including Powerpoint slides and a solutions manual"--

ISBN: 9781108494540NT$1573

Source: cam 2200409 i 4500

LCCN: 2019056087

Nat. Bib. No.: GBC018610bnb

Nat. Bib. Agency Control No.: 019702525UkSubjects--Topical Terms:

257859
Phase-locked loops
--Design and construction.

LC Class. No.: TK7872.P38 / R388 2020

Dewey Class. No.: 621.3815/364

Design of CMOS phase-locked loops :from circuit level to architecture level /
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245 1 0 $a Design of CMOS phase-locked loops : $b from circuit level to architecture level / $c Behzad Razavi, University of California, Los Angeles.
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504 $a Includes bibliographical references and index.
520 $a "A quick search on Google brings up nearly two dozen books on PLLs. So why another one? This book addresses the need for a text that methodically teaches modern CMOS PLLs for a wide range of applications. The objective is to teach the reader how to approach PLLs from transistor-level design to architecture development. Based on 25 years of teaching courses on the subject and the latest trends in industry, this book deals with oscillators, phase noise, analog phase-locked loops, digital phase-locked loops, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers. The objective is to reach a broad spectrum of readers while maintaining a cohesive flow. As with my past writings, I have implemented a multitude of pedagogical tools to help the reader learn efficiently-and experience the pleasure of learning. One principle that I uphold in writing is to start with the simplest possible arrangement, teach how it works and what shortcomings it has, and then add components to it to improve its performance. This approach allows the reader to see how a basic architecture evolves to a complex system. After laying the theoretical foundation for each topic, I present a step-by-step design flow and proceed to design the circuit. And not all design efforts are successful. The reader can clearly see how certain decisions lead to a dead end and how we revise these decisions to reach a new, more practical solution. This exploratory mentality not only makes the process of learning more exciting but also helps the reader see why each component is necessary, what criteria govern its choice, and what not to do. A unique aspect of this book is its extensive use of simulations to teach design and investigate agreement between theory and practice. For each design, I use the theoretical basis to choose certain parameters and predict the performance, and then I simulate the circuit. If the simulation results do not agree with the predictions, I delve into the details and determine why. Another unique aspect of this book is that it leverages concepts from one field (e.g., wireless technology) to another (e.g., wireline communications) by bringing the vast knowledge in these fields under one roof. A website for the book provides additional resources for readers and instructors, including Powerpoint slides and a solutions manual"-- $c Provided by publisher.
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650 0 $a Metal oxide semiconductors, Complementary $x Design and construction. $3 184363
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