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On-chip networks

Jerger, Natalie Enright,

On-chip networks

Record Type:	Electronic resources : Monograph/item
Title/Author:	On-chip networksNatalie Enright Jerger, Tushar Krishna, Li-Shiuan Peh.
Author:	Jerger, Natalie Enright,
other author:	Krishna, Tushar,
Description:	1 online resource (212 p.)
Subject:	Networks on a chip.
Online resource:	https://portal.igpublish.com/iglibrary/search/MCPB0006324.html
ISBN:	1627059148

On-chip networks
Jerger, Natalie Enright,

On-chip networks[electronic resource] /Natalie Enright Jerger, Tushar Krishna, Li-Shiuan Peh. - 2nd ed. - 1 online resource (212 p.) - Synthesis lectures on computer architecture ;40. - Synthesis lectures on computer architecture ;52..

Includes bibliographical references and index.

On-chip networks, second edition -- Abstract, Keywords -- Dedication -- Contents -- Preface -- Acknowledgments -- Chapter 1. Introduction -- Chapter 2. Interface with System Architecture -- Chapter 3. Topology -- Chapter 4. Routing -- Chapter 5. Flow Control -- Chapter 6. Router Microarchitecture -- Chapter 7. Modeling and Evaluation -- Chapter 8. Case Studies -- Chapter 9. Conclusions -- References -- Authors' Biographies.

This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research. With the rapid advances in this field, we felt it was timely to update and review the state of the art in this second edition. We introduce two new chapters at the end of the book. We have updated the latest research of the past years throughout the book and also expanded our coverage of fundamental concepts to include several research ideas that have now made their way into products and, in our opinion, should be textbook concepts that all on-chip network practitioners should know. For example, these fundamental concepts include message passing, multicast routing, and bubble flow control schemes.

Mode of access: World Wide Web.

ISBN: 1627059148Subjects--Topical Terms:

349077
Networks on a chip.
Index Terms--Genre/Form:

214472
Electronic books.

LC Class. No.: TK5105.546

Dewey Class. No.: 004.1

On-chip networks
LDR:02779nmm a2200301 i 4500 001 603308
006 m eo d
008 211117s2017 cau ob 000 0 eng d
020 $a 1627059148
020 $a 1627059962
020 $a 9781627059145
020 $a 9781627059961
035 $a MCPB0006324
040 $a iG Publishing $b eng $c iG Publishing $e rda
050 0 0 $a TK5105.546
082 0 0 $a 004.1
100 1 $a Jerger, Natalie Enright, $e author. $3 899583
245 1 0 $a On-chip networks $h [electronic resource] / $c Natalie Enright Jerger, Tushar Krishna, Li-Shiuan Peh.
250 $a 2nd ed.
264 1 $a San Rafael : $b Morgan & Claypool Publishers, $c 2017.
300 $a 1 online resource (212 p.)
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
490 1 $a Synthesis lectures on computer architecture ; $v 40
504 $a Includes bibliographical references and index.
505 0 $a On-chip networks, second edition -- Abstract, Keywords -- Dedication -- Contents -- Preface -- Acknowledgments -- Chapter 1. Introduction -- Chapter 2. Interface with System Architecture -- Chapter 3. Topology -- Chapter 4. Routing -- Chapter 5. Flow Control -- Chapter 6. Router Microarchitecture -- Chapter 7. Modeling and Evaluation -- Chapter 8. Case Studies -- Chapter 9. Conclusions -- References -- Authors' Biographies.
520 3 $a This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research. With the rapid advances in this field, we felt it was timely to update and review the state of the art in this second edition. We introduce two new chapters at the end of the book. We have updated the latest research of the past years throughout the book and also expanded our coverage of fundamental concepts to include several research ideas that have now made their way into products and, in our opinion, should be textbook concepts that all on-chip network practitioners should know. For example, these fundamental concepts include message passing, multicast routing, and bubble flow control schemes.
538 $a Mode of access: World Wide Web.
650 0 $a Networks on a chip. $3 349077
650 0 $a Embedded computer systems. $3 184402
655 4 $a Electronic books. $2 local. $3 214472
700 1 $a Krishna, Tushar, $e author. $3 899511
700 1 $a Peh, Li-Shiuan, $e author. $3 899584
700 1 $a Martonosi, Margaret, $e editor. $3 842601
830 0 $a Synthesis lectures on computer architecture ; $v 52. $3 899516
856 4 0 $u https://portal.igpublish.com/iglibrary/search/MCPB0006324.html