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Resource efficient LDPC decodersfrom algorithms to hardware architectures /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Resource efficient LDPC decodersVikram Arkalgud Chandrasetty.
其他題名:	from algorithms to hardware architectures /
作者:	Chandrasetty, Vikram Arkalgud.
其他作者:	Aziz, Sayed Mahfuzul.
出版者:	Amsterdam :Academic Press,2018.
面頁冊數:	1 online resource.
標題:	Decoders (Electronics)
電子資源:	https://www.sciencedirect.com/science/book/9780128112557
ISBN:	9780128112564 (electronic bk.)

Resource efficient LDPC decodersfrom algorithms to hardware architectures /
Chandrasetty, Vikram Arkalgud.

Resource efficient LDPC decodersfrom algorithms to hardware architectures /[electronic resource] :Vikram Arkalgud Chandrasetty. - Amsterdam :Academic Press,2018. - 1 online resource.

Includes bibliographical references and index.

1.Introduction 2. Overview of LDPC codes 3. Structure and flexibility of LDPC codes 4. LDPC decoding algorithms 5. LDPC decoder architectures 6. Hardware implementation of LDPC decoder 7. LDPC decoders in multimedia communication References 8. Prospective LDPC applications Appendix-A : Sample C-Programs and MATLAB models for LDPC code construction and simulation Appendix-B : Sample Verilog HDL codes for implementation of fully-parallel LDPC decoder architecture Appendix-C : Sample Verilog HDL codes for implementation of partially-parallel LDPC decoder architecture.

ISBN: 9780128112564 (electronic bk.)

Nat. Bib. No.: GBB7M5430bnbSubjects--Topical Terms:

711274
Decoders (Electronics)
Index Terms--Genre/Form:

214472
Electronic books.

LC Class. No.: TK7872.D37

Dewey Class. No.: 621.38932

Resource efficient LDPC decodersfrom algorithms to hardware architectures /
LDR:01341cmm a2200229 a 4500 001 625145
006 m o d
007 cr |n|||||||||
008 230109s2018 ne ob 001 0 eng
015 $a GBB7M5430 $2 bnb
020 $a 9780128112564 (electronic bk.)
020 $a 9780128112557 (pbk.)
035 $a 021071039
040 $a StDuBDS $b eng $c StDuBDS $d Uk
041 0 $a eng
050 4 $a TK7872.D37
082 0 4 $a 621.38932 $2 23
100 1 $a Chandrasetty, Vikram Arkalgud. $3 524550
245 1 0 $a Resource efficient LDPC decoders $h [electronic resource] : $b from algorithms to hardware architectures / $c Vikram Arkalgud Chandrasetty.
260 $a Amsterdam : $b Academic Press, $c 2018.
300 $a 1 online resource.
504 $a Includes bibliographical references and index.
505 0 $a 1.Introduction 2. Overview of LDPC codes 3. Structure and flexibility of LDPC codes 4. LDPC decoding algorithms 5. LDPC decoder architectures 6. Hardware implementation of LDPC decoder 7. LDPC decoders in multimedia communication References 8. Prospective LDPC applications Appendix-A : Sample C-Programs and MATLAB models for LDPC code construction and simulation Appendix-B : Sample Verilog HDL codes for implementation of fully-parallel LDPC decoder architecture Appendix-C : Sample Verilog HDL codes for implementation of partially-parallel LDPC decoder architecture.
650 0 $a Decoders (Electronics) $3 711274
650 0 $a Digital communications. $3 182399
655 4 $a Electronic books. $2 local. $3 214472
700 1 $a Aziz, Sayed Mahfuzul. $3 928252
856 4 0 $u https://www.sciencedirect.com/science/book/9780128112557