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Computer architecture :a quantitative approach /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Computer architecture :John L. Hennessy, David A. Patterson.
Reminder of title:	a quantitative approach /
Author:	Hennessy, John L.,
other author:	Patterson, David A.,
Published:	Cambridge, MA :Morgan Kaufmann Publishers,c2019.
Description:	1 v. (various pagings) :ill. ;24 cm.
Subject:	Computer architecture.
ISBN:	9780128119051 (pbk.) :

Computer architecture :a quantitative approach /
Hennessy, John L.,

Computer architecture :a quantitative approach /John L. Hennessy, David A. Patterson. - 6th ed. - Cambridge, MA :Morgan Kaufmann Publishers,c2019. - 1 v. (various pagings) :ill. ;24 cm.

Includes bibliographical references and index.

Fundamentals of quantitative design and analysis -- Memory hierarchy design -- Instruction-level parallelism and its exploitation -- Data-level parallelism in vector, SIMD, and GPU architectures -- Thread-level parallelism -- Warehouse-scale computers to exploit request-level and data-level parallelism -- Domain-specific architectures -- Appendix A. Instruction set principles ; Appendix B. Review of memory hierarchy ; Appendix C. Pipelining : basic and intermediate concepts -- Online appendices. Appendix D. Storage systems ; Appendix E. Embedded systems ; Appendix F. Interconnection networks ; Appendix G. Vector processors in more depth ; Appendix H. Hardware and software for VLIW and EPIC ; Appendix I. Large-scale multiprocessors and scientific applications ; Appendix J. Computer arithmetic ; Appendix K. Survey of instruction set architectures ; Appendix L. Advanced concepts on address translation ; Appendix M. Historical perspectives and references.

Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook is fully revised with the latest developments in processor and system architecture. It now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC. True to its original mission of demystifying computer architecture, this edition continues the longstanding tradition of focusing on areas where the most exciting computing innovation is happening, while always keeping an emphasis on good engineering design.

ISBN: 9780128119051 (pbk.) :NT$2967

LCCN: 2017959491Subjects--Topical Terms:

183006
Computer architecture.

LC Class. No.: QA76.9.A73 / P377 2019

Dewey Class. No.: 004.2/2

Computer architecture :a quantitative approach /
LDR:02726cam a2200253 a 4500 001 636395
003 OCoLC
005 20230728015822.0
008 230810s2019 maua b 001 0 eng
010 $a 2017959491
020 $a 9780128119051 (pbk.) : $c NT$2967
020 $a 0128119055 (pbk.)
035 $a (OCoLC)983459758 $z (OCoLC)983678310 $z (OCoLC)1201019634
035 $a ocn983459758
040 $a DLC $b eng $c DLC $d IMN $d FQG $d MEAUC $d MYG $d TXI $d WCM $d UAB $d NRC
042 $a pcc
050 0 0 $a QA76.9.A73 $b P377 2019
082 0 0 $a 004.2/2 $2 23
100 1 $a Hennessy, John L., $e author. $3 765785
245 1 0 $a Computer architecture : $b a quantitative approach / $c John L. Hennessy, David A. Patterson.
250 $a 6th ed.
260 $a Cambridge, MA : $b Morgan Kaufmann Publishers, $c c2019.
300 $a 1 v. (various pagings) : $b ill. ; $c 24 cm.
504 $a Includes bibliographical references and index.
505 0 $a Fundamentals of quantitative design and analysis -- Memory hierarchy design -- Instruction-level parallelism and its exploitation -- Data-level parallelism in vector, SIMD, and GPU architectures -- Thread-level parallelism -- Warehouse-scale computers to exploit request-level and data-level parallelism -- Domain-specific architectures -- Appendix A. Instruction set principles ; Appendix B. Review of memory hierarchy ; Appendix C. Pipelining : basic and intermediate concepts -- Online appendices. Appendix D. Storage systems ; Appendix E. Embedded systems ; Appendix F. Interconnection networks ; Appendix G. Vector processors in more depth ; Appendix H. Hardware and software for VLIW and EPIC ; Appendix I. Large-scale multiprocessors and scientific applications ; Appendix J. Computer arithmetic ; Appendix K. Survey of instruction set architectures ; Appendix L. Advanced concepts on address translation ; Appendix M. Historical perspectives and references.
520 $a Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook is fully revised with the latest developments in processor and system architecture. It now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC. True to its original mission of demystifying computer architecture, this edition continues the longstanding tradition of focusing on areas where the most exciting computing innovation is happening, while always keeping an emphasis on good engineering design. $c --publisher.
650 0 $a Computer architecture. $3 183006
700 1 $a Patterson, David A., $e author. $3 765783