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Programming FPGAs :getting started with Verilog /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Programming FPGAs :Simon Monk.
其他題名:	getting started with Verilog /
其他題名:	Programming field-programmable gate arrays
作者:	Monk, Simon,
面頁冊數:	xiii, 177 pages :illustrations ;23 cm
附註:	Includes index.
標題:	Field programmable gate arrays.
ISBN:	9781259643767

Programming FPGAs :getting started with Verilog /
Monk, Simon,

Programming FPGAs :getting started with Verilog /Programming field-programmable gate arraysSimon Monk. - xiii, 177 pages :illustrations ;23 cm

Includes index.

Machine generated contents note: 1.Logic -- Logic Gates -- The not Gate -- The and Gate -- The or Gate -- NAND and NOR Gates -- XOR Gates -- Binary -- Adding with Logic -- Flip-Flops -- Set-Reset Flip-Flop -- Shift Registers -- Binary Counters -- Summary -- 2.FPGAs -- How an FPGA Works -- The Elbert 2 -- The Mojo -- The Papilio -- Software Setup -- Installing ISE -- Installing Elbert Software -- Installing Mojo Software -- Installing Papilio Software -- Project Files -- Summary -- 3.Drawing Logic -- A Data Selector Example -- Step 1 Create a New Project -- Step 2 Create a New Schematic Source -- Step 3 Add the Logic Symbols -- Step 4 Connect the Gates -- Step 5 Add the IO Markers -- Step 6 Create a User Constraints File -- Step 7 Generate the bit File -- Step 8 Program Your Board -- Testing the Result -- A 4-Bit Counter Example -- Drawing the Schematic -- Implementation Constraints Files -- Testing the Counter -- Summary -- 4.Introducing Verilog -- Modules -- Wires, Registers, and Buses -- Parallel Execution -- Number Format -- Data Selector in Verilog -- A Counter in Verilog -- Synchronous Logic -- Summary -- 5.Modular Verilog -- A Seven-Segment Decoder -- Button Debouncing -- Multiplexed Seven-Segment Display and Counter -- Project Structure -- Display_7_seg -- Counter_7_seg -- User Constraints File -- Importing Source Code for Modules -- Setting the Top-Level Module -- The Three-Digit Version -- Testing -- Summary -- 6.Timer Example -- State Machines -- State Machine Design -- Hardware -- You Will Need -- Construction -- Modules -- User Constraints File -- The Timer Module -- Inputs and Outputs -- Push Buttons -- Alarm Module Instance -- Modeling Time and the Display -- State Machine Implementation -- Tasks -- Testing -- Summary -- 7.PWM and Servomotors -- Pulse-Width Modulation -- A PWM Module -- PWM Module Inputs and Outputs -- A Tester of the PWM Module -- Trying It Out -- Servomotors -- Hardware -- You Will Need -- Construction -- A Servo Module -- Summary -- 8.Audio -- Simple Tone Generation -- Audio Output from the Mojo -- A General-Purpose Tone/Frequency Generator -- The Tone Module -- The tone tester Module -- Testing -- Playing an Audio File -- Audio Files -- RAM -- The wav_player Module -- Testing -- Preparing Your Own Sounds -- Summary -- 9.Video -- VGA -- VGA Timings -- Drawing Rectangles -- A VGA Module -- VGA and the Elbert 2 -- Making Things Move -- A Memory-Mapped Display -- Preparing an Image -- Summary -- 10.What Next -- Simulation -- Under the Hood -- Cores and Soft Processors -- More on the Papilio -- More on the Mojo -- Summary -- A.Resources -- Buying FPGA Boards -- Components -- Other FPGA Boards -- Web Resources -- B.Elbert 2 Reference -- ISE New Project Settings -- Prototype Net Mapping -- LEDs -- Three-Digit Display -- DIP Slide Switches -- Push Switches -- VGA -- Audio and Micro-SD -- GPIO Pins -- Header P1 -- Header P6 -- Header P2 -- Header P4 -- Clock -- C.Mojo Reference -- ISE New Project Settings -- NET Mapping (IO Shield) -- LEDs -- Four-Digit Display -- Slide Switches -- Push Buttons -- Clock Pin -- Complete UCF for IO Shield -- D.Papilio One Reference -- ISE New Project Settings -- LogicStart MegaWing NET Mapping -- LEDs -- Four-Digit Display -- DIP Slide Switches -- Joystick Switches -- VGA -- Audio -- Analog-to-Digital Converter -- Clock Pin -- GPIO Pins.

"This fun guide shows how to get started with FPGA technology using the popular Mojo, Papilio One, and Elbert 2 boards. Written by electronics guru Simon Monk, Programming FPGAs: Getting Started with Verilog features clear explanations, easy-to-follow examples, and downloadable sample programs. You'll get start-to-finish assembly and programming instructions for numerous projects, including an LED decoder, a timer, a tone generator - even a memory-mapped video display! The book serves both as a hobbyists' guide and as an introduction for professional developers." --Publisher's description.

ISBN: 9781259643767

McGraw-Hill, Customer Service Po Box 545, Blacklick, OH, USA, 43004SAN 200-254X

Nat. Bib. Agency Control No.: 018480955UkSubjects--Topical Terms:

246658
Field programmable gate arrays.

LC Class. No.: TK7885.7 / .M66 2017

Dewey Class. No.: 621.39/5

Programming FPGAs :getting started with Verilog /
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505 0 $a Machine generated contents note: 1.Logic -- Logic Gates -- The not Gate -- The and Gate -- The or Gate -- NAND and NOR Gates -- XOR Gates -- Binary -- Adding with Logic -- Flip-Flops -- Set-Reset Flip-Flop -- Shift Registers -- Binary Counters -- Summary -- 2.FPGAs -- How an FPGA Works -- The Elbert 2 -- The Mojo -- The Papilio -- Software Setup -- Installing ISE -- Installing Elbert Software -- Installing Mojo Software -- Installing Papilio Software -- Project Files -- Summary -- 3.Drawing Logic -- A Data Selector Example -- Step 1 Create a New Project -- Step 2 Create a New Schematic Source -- Step 3 Add the Logic Symbols -- Step 4 Connect the Gates -- Step 5 Add the IO Markers -- Step 6 Create a User Constraints File -- Step 7 Generate the bit File -- Step 8 Program Your Board -- Testing the Result -- A 4-Bit Counter Example -- Drawing the Schematic -- Implementation Constraints Files -- Testing the Counter -- Summary -- 4.Introducing Verilog -- Modules -- Wires, Registers, and Buses -- Parallel Execution -- Number Format -- Data Selector in Verilog -- A Counter in Verilog -- Synchronous Logic -- Summary -- 5.Modular Verilog -- A Seven-Segment Decoder -- Button Debouncing -- Multiplexed Seven-Segment Display and Counter -- Project Structure -- Display_7_seg -- Counter_7_seg -- User Constraints File -- Importing Source Code for Modules -- Setting the Top-Level Module -- The Three-Digit Version -- Testing -- Summary -- 6.Timer Example -- State Machines -- State Machine Design -- Hardware -- You Will Need -- Construction -- Modules -- User Constraints File -- The Timer Module -- Inputs and Outputs -- Push Buttons -- Alarm Module Instance -- Modeling Time and the Display -- State Machine Implementation -- Tasks -- Testing -- Summary -- 7.PWM and Servomotors -- Pulse-Width Modulation -- A PWM Module -- PWM Module Inputs and Outputs -- A Tester of the PWM Module -- Trying It Out -- Servomotors -- Hardware -- You Will Need -- Construction -- A Servo Module -- Summary -- 8.Audio -- Simple Tone Generation -- Audio Output from the Mojo -- A General-Purpose Tone/Frequency Generator -- The Tone Module -- The tone tester Module -- Testing -- Playing an Audio File -- Audio Files -- RAM -- The wav_player Module -- Testing -- Preparing Your Own Sounds -- Summary -- 9.Video -- VGA -- VGA Timings -- Drawing Rectangles -- A VGA Module -- VGA and the Elbert 2 -- Making Things Move -- A Memory-Mapped Display -- Preparing an Image -- Summary -- 10.What Next -- Simulation -- Under the Hood -- Cores and Soft Processors -- More on the Papilio -- More on the Mojo -- Summary -- A.Resources -- Buying FPGA Boards -- Components -- Other FPGA Boards -- Web Resources -- B.Elbert 2 Reference -- ISE New Project Settings -- Prototype Net Mapping -- LEDs -- Three-Digit Display -- DIP Slide Switches -- Push Switches -- VGA -- Audio and Micro-SD -- GPIO Pins -- Header P1 -- Header P6 -- Header P2 -- Header P4 -- Clock -- C.Mojo Reference -- ISE New Project Settings -- NET Mapping (IO Shield) -- LEDs -- Four-Digit Display -- Slide Switches -- Push Buttons -- Clock Pin -- Complete UCF for IO Shield -- D.Papilio One Reference -- ISE New Project Settings -- LogicStart MegaWing NET Mapping -- LEDs -- Four-Digit Display -- DIP Slide Switches -- Joystick Switches -- VGA -- Audio -- Analog-to-Digital Converter -- Clock Pin -- GPIO Pins.
520 $a "This fun guide shows how to get started with FPGA technology using the popular Mojo, Papilio One, and Elbert 2 boards. Written by electronics guru Simon Monk, Programming FPGAs: Getting Started with Verilog features clear explanations, easy-to-follow examples, and downloadable sample programs. You'll get start-to-finish assembly and programming instructions for numerous projects, including an LED decoder, a timer, a tone generator - even a memory-mapped video display! The book serves both as a hobbyists' guide and as an introduction for professional developers." --Publisher's description.
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