Low voltage integrated circuits - Design and construction.

Power aware design methodologies by: (書目-電子資源)

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuitsthe semi-empirical and compact model approaches / by: (書目-電子資源)

Extreme low-power mixed signal IC designsubthreshold source-coupled circuits / by: (書目-電子資源)

Ultra low-power integrated circuit design for wireless neural interfaces by: (書目-電子資源)

Low-power variation-tolerant design in nanometer silicon by: (書目-電子資源)

Analog IC design with low-dropout regulators by: (書目-語言資料,印刷品)

Low power and reliable SRAM memory cell and array design by: (書目-電子資源)

CMOS high efficiency on-chip power management by: (書目-電子資源)

Low power design with high-level power estimation and power-aware synthesis by: (書目-電子資源)

Ultra-low-voltage design of energy-efficient digital circuits by: (書目-電子資源)

Transformer-based design techniques for oscillators and frequency dividers by: (書目-電子資源)

System on chip interfaces for low power design by: (書目-電子資源)

Design and modeling of low power VLSI systems by: (書目-電子資源)

Low-power electronics design / by: (書目-語言資料,印刷品)

Inverter-based circuit design techniques for low supply voltages by: (書目-電子資源)

Low-power design and power-aware verification by: (書目-電子資源)

Design of low power integrated radios for emerging standards by: (書目-電子資源)

Systematic design of analog CMOS circuitsusing pre-computed lookup tables / by: (書目-電子資源)