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以投影座標實現高效能架構之橢圓曲線晶片 = The Hardware I...

國立高雄大學電機工程學系碩士班

以投影座標實現高效能架構之橢圓曲線晶片 = The Hardware Implementation of High-Efficiency Architecture for ECC in Projective Coordinate

Record Type:	Language materials, printed : monographic
Paralel Title:	The Hardware Implementation of High-Efficiency Architecture for ECC in Projective Coordinate
Author:	張正賢,
Secondary Intellectual Responsibility:	國立高雄大學
Place of Publication:	[高雄市]
Published:	撰者;
Year of Publication:	2009[民98]
Description:	81面圖、表 : 30公分;
Subject:	Galois field
Subject:	Elliptic curve cryptographic
Online resource:	http://handle.ncl.edu.tw/11296/ndltd/61995538423390994890
Notes:	參考書目：面
Notes:	指導教授：洪進華
Summary:	在公開金鑰中，橢圓曲線在足夠的安全強度下，以較短的金鑰長度可達到以往安全強度的需求。在本論文中提出了高效能橢圓曲線晶片利用多項式基底來做實現並滿足Galois fields GF (2163)。架構的實現上採用了Lopez-Dahab 投影座標系，為橢圓曲線之Scalar Multiplication 加解密晶片的運算核心。我們使用了non-adjacent form (NAF) 編碼方式為了更有效率實現橢圓曲線的點乘法運算，以及利用混合投影座標系統以避免了冗長的倒數運算。其中binary add、fast square、digit-serial multiplication 、Itoh-Tsujii 倒數演算法與NAF來完成整個橢圓曲線之運算核心。所有的模組依據其複雜度皆採用階層式架構，在硬體實現上，我們利用CIC所提供之TSMC 0.18 um 製程，晶片面積為69.7 K (gate count)，且最高速度可達到151MHz橢圓曲線之 scalar multiplication平均運算時間為0.65ms。 Elliptic curve cryptographic (ECC) provides a similar level of security to conventional public-key algorithms, but with much shorter keys. In this paper, we propose a high efficiency elliptic curve cryptographic processor over Galois fields GF (2163). The proposed architecture is based on a Lopez-Dahab projective coordinates elliptic curve point multiplication algorithm, and polynomial basis representation for GF (2m) field arithmetic is adopted. We use on-the-fly redundant binary converter to boost the throughput of the EC scalar multiplication. The EC scalar multiplication is a main operation module that includes binary add, digit-serial multiplier, Itoh-Tsujii inverse, fast square and non-adjacent form (NAF) in ECC architecture.All modules are organized in a hierarchical structure according to their complexity. In the hardware implementations using a 0.18 TSMC cell library, a 69.7 K gate count is possessed, and the maximum speed is 151 MHz. The EC multiplication time is 0.65 ms.

以投影座標實現高效能架構之橢圓曲線晶片 = The Hardware Implementation of High-Efficiency Architecture for ECC in Projective Coordinate
張, 正賢

以投影座標實現高效能架構之橢圓曲線晶片 = The Hardware Implementation of High-Efficiency Architecture for ECC in Projective Coordinate / 張正賢撰 - [高雄市] : 撰者, 2009[民98]. - 81面 ; 圖、表 ; 30公分.
參考書目：面指導教授：洪進華.
Galois fieldElliptic curve cryptographic

以投影座標實現高效能架構之橢圓曲線晶片 = The Hardware Implementation of High-Efficiency Architecture for ECC in Projective Coordinate
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