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Semiconductor advanced packaging

Lau, John H.

Semiconductor advanced packaging

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Semiconductor advanced packagingby John H. Lau.
作者:	Lau, John H.
出版者:	Singapore :Springer Singapore :2021.
面頁冊數:	xxii, 498 p. :ill., digital ;24 cm.
Contained By:	Springer Nature eBook
標題:	SemiconductorsDesign and construction.
電子資源:	https://doi.org/10.1007/978-981-16-1376-0
ISBN:	9789811613760$q(electronic bk.)

Semiconductor advanced packaging
Lau, John H.

Semiconductor advanced packaging[electronic resource] /by John H. Lau. - Singapore :Springer Singapore :2021. - xxii, 498 p. :ill., digital ;24 cm.

Recent Advance on Semiconductor Packaging -- System-in-Package -- Fan-In Wafer/Panel-Level Chip-Scale Packages -- Fan-Out Wafer/Panel-Level Packaging -- 2D, 2.1D, and 2.3D IC Integration -- 2.5D IC Integration -- 3D IC Integration -- Hybrid Bonding -- Chiplets Packaging -- Dielectric Materials -- Trends and Roadmap for Advanced Semiconductor Packaging.

The book focuses on the design, materials, process, fabrication, and reliability of advanced semiconductor packaging components and systems. Both principles and engineering practice have been addressed, with more weight placed on engineering practice. This is achieved by providing in-depth study on a number of major topics such as system-in-package, fan-in wafer/panel-level chip-scale packages, fan-out wafer/panel-level packaging, 2D, 2.1D, 2.3D, 2.5D, and 3D IC integration, chiplets packaging, chip-to-wafer bonding, wafer-to-wafer bonding, hybrid bonding, and dielectric materials for high speed and frequency. The book can benefit researchers, engineers, and graduate students in fields of electrical engineering, mechanical engineering, materials sciences, and industry engineering, etc.

ISBN: 9789811613760$q(electronic bk.)

Standard No.: 10.1007/978-981-16-1376-0doiSubjects--Topical Terms:

182501
Semiconductors
--Design and construction.

LC Class. No.: TK7871.85 / .L38 2021

Dewey Class. No.: 621.38152

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505 0 $a Recent Advance on Semiconductor Packaging -- System-in-Package -- Fan-In Wafer/Panel-Level Chip-Scale Packages -- Fan-Out Wafer/Panel-Level Packaging -- 2D, 2.1D, and 2.3D IC Integration -- 2.5D IC Integration -- 3D IC Integration -- Hybrid Bonding -- Chiplets Packaging -- Dielectric Materials -- Trends and Roadmap for Advanced Semiconductor Packaging.
520 $a The book focuses on the design, materials, process, fabrication, and reliability of advanced semiconductor packaging components and systems. Both principles and engineering practice have been addressed, with more weight placed on engineering practice. This is achieved by providing in-depth study on a number of major topics such as system-in-package, fan-in wafer/panel-level chip-scale packages, fan-out wafer/panel-level packaging, 2D, 2.1D, 2.3D, 2.5D, and 3D IC integration, chiplets packaging, chip-to-wafer bonding, wafer-to-wafer bonding, hybrid bonding, and dielectric materials for high speed and frequency. The book can benefit researchers, engineers, and graduate students in fields of electrical engineering, mechanical engineering, materials sciences, and industry engineering, etc.
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